Sep 27 2007
The monster capacitor bites again
On my last tapeout, I laid out a 500um x 400um array of MOS capacitors for decoupling purposes. I don’t remember the exact capacitance, but I think it was around 500pF which is insanely large for an on-chip capacitor. I got my chip back a few weeks ago and it’s quite sad that I can see that block of MOS capacitors with the naked eye. What’s worse is that this capacitor took up more area than the rest of my circuit.
This December, I will have another tapeout and it looks like I will have at least one monster capacitor. I am guessing it will be about 200um x 200um and have a capacitance of about 100pF. However, because I will also have massive inductors on the same die, a 200um x 200um capacitor does not hurt as much percentage-wise as it did last time.
I have a bad feeling that I will use monster caps many times in future tapeouts. ? In analog/RF, sometimes you just need fat decoupling capacitors. Yes, sometimes it is possible to place these capacitors off-chip, but other times you need mad amounts of local on-chip decoupling capacitance and you just have to pay the price with area. I guess in the name of integration it would also be better to put these caps on-chip. Integration is such a pain.
[...] -10dB if I made the capacitor big enough, but even at 100pF my S11 only went as low as -9dB. I already have a monster 100pF cap somewhere else on my chip and I don’t have enough room for another monster [...]